INTRODUCTION
I am focused on developing mathematical models, heuristics, and machine learning/artificial intelligence solutions to optimize the use of computation and communication resources and to maximize application performance in computing systems, including datacenters and cloud processors/servers.
Office Hours: T 12pm-1pm, W 3pm-4:30pm, and R 10:45am - 12:15pm (or by appointment)
Education & Training
PhD in Computer Science, University of Louisiana at Lafayette, Dec 2017
MS in Computer Science, University of Louisiana at Lafayette, May 2014
Master of Business Administration, Institute of Business Administration (IBA), University of Dhaka, 2011
BS in Computer Science and Engineering, Bangladesh University of Engineering & Technology (BUET), 2005
Conference Presentations
IEEE/ACM MICRO/NoCArc 2023, IEEE COINS 2023, IEEE/ACM MICRO/NoCArc 2022, IEEE AICAS 2022, IEEE/ACM MICRO/NoCArc 2021, IEEE ISOCC Oct’2021, IEEE MWSCAS 2021, IEEE SOCC 2020, IEEE MWSCAS 2020, IEEE/ACM NOCS 2019, IEEE SOCC 2018, IEEE ICCD 2018, IEEE ISCAS 2017, ACM GLSVLSI 2016, ACM/IEEE DAC 2014
Community
- Technical Program Co-Chair, IEEE NoCArc/MICRO, Toronto, Canada, October 2023.
- Track Chair of “Machine Learning for Energy-efficient Manycore Interconnects” track at 17th International Symposium on Embedded Multicore/Many-core System-on-Chip Conference (MCSoC), 2024
- Special Sessions and Workshop Chair, 17th IEEE International Symposium on Embedded Multicore/Many-core System-on-Chip Conference (MCSoC), Malaysia, 2024
- Technical Program Committee Member, 33rd ACM Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, TN, USA 2023
- Special Sessions and Workshop Chair, 16th IEEE International Symposium on Embedded Multicore/Many-core System-on-Chip Conference (MCSoC), Singapore, 2023
- Publicity Co-Chair, IEEE International Conference on Omni-layer Intelligent Systems (COINS), Berlin, Germany, 2023
- Track Chair of “Machine Learning for Energy-efficient Manycore Interconnects” track at 16th International Symposium on Embedded Multicore/Many-core System-on-Chip Conference (MCSoC), 2023
- Technical Program Committee Member of "Circuits and Systems (CAS) Designs for AI & IoT" track at IEEE COINS 2023
- Session Chair, "Session 2: Interconnects for High-Performance and Quantum Computing", "Session 3: Routing Algorithms for Emerging Architectures", and Keynote Session "Photonic Systems-on-Chip for Deep Learning", IEEE NoCArc/MICRO 2023.
- Publicity Co-Chair of International Workshop on Network on Chip Architectures (NoCArc), held in conjunction with 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022
- Session Chair of International Workshop on Network on Chip Architectures (NoCArc), held in conjunction with 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022
- Track Chair of "Internet of Things (IOT): From Device, to Fog, and Cloud" Track, IEEE International Conference on Omni-layer Intelligent Systems (COINS), 2022
- Session Chair of "Novel Computation and Communication Methods for AI Accelerator Design", IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022
- Special Session Organizer, IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022
- Publication Co-Chair, IEEE International System-on-Chip Conference (SOCC), 2020-2022
- Publicity Co-Chair, IEEE International Conference on Omni-layer Intelligent Systems (COINS), 2022
- Technical Program Committee Member of International Workshop on Network on Chip Architectures (NoCArc), to be held in conjunction with 54th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2021
- Technical Program Committee Member of IEEE International System-on-Chip Conference (SOCC), 2020-Present
- Technical Program Committee Member of IEEE International Conference on Omni-layer Intelligent Systems (COINS), 2020- Present
- Review Committee Member, IEEE International Symposium on Circuits and Systems (ISCAS), 2017-Present
- Session Chair: Served as a chair in the “Security” session at the IEEE SOCC, 2020
- Session Chair: Served as a chair in the “Estimation and Optimization of NoC and System Reliability” session at the IEEE MWSCAS, 2020
- Journal Paper Reviewer: IEEE Network Magazine, IEEE Transactions on Parallel and Distributed Computing (TPDS), IEEE Access, IEEE Transactions on Sustainable Computing (TSUSC), IEEE Transactions on Emerging Topics in Computing (TETC), Elsevier Nano Communication Networks (NanoComm), Springer Design Automation for Embedded Systems (DAEM), Elsevier VLSI Integration, Elsevier Information Systems
- Conference Paper Reviewer: IEEE/ACM NoCArc'21, IEEE SOCC'20, IEEE ISCAS'17-Present, IEEE COINS'20, IEEE MWSCAS'18, IEEE ISVLSI'19; Served as a secondary reviewer for following conferences: IEEE ICCD, 2018; IEEE/ACM NOCS'18; IEEE ISCAS'14-16; IEEE SOCC'14; ACM/IEEE ASP-DAC'15-16
- University Committee Member: Grant and Research Committee Member, Eastern Illinois University, Aug 2021 – Present; Social and Good of the Order, Eastern Illinois University, Aug 2021 – Present; Computer Science Group, University of Central Missouri, Aug 2019 – Aug 2021
- Volunteer: 42nd IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), New Orleans, LA, USA, 2017; PhD Forum Coordination (as A. Richard Newton Young Fellow) in 51st ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2014
- Membership of Professional Organizations: Association for Computing Machinery (ACM), Institute of Electrical and Electronics Engineers (IEEE), IEEE Young Professionals
Publications
Links to my research articles are available in Google Scholar
https://scholar.google.com/citations?user=FqIA9yAAAAAJ&hl=en
- Md Farhadur Reza, Alex Yeazel, Mapping Model and Heuristics for Accelerating Deep Neural Networks and for Energy-Efficient Networks-On-Chip, Accepted to appear in the Proceedings of IEEE SouthEastCon Conference 2024, Atlanta, GA, USA, March 2024.
- Md Farhadur Reza, “Machine Learning Enabled Solutions for Design and Optimization Challenges in Networks-on-Chip based Multi/Many-Core Architectures”, ACM Journal on Emerging Technologies in Computing Systems, Volume 19, Number 3, Article 23 (July 2023), https://doi.org/10.1145/3591470.
- Md Farhadur Reza, Zachary McCloud, Heuristics-Enabled High-Performance Application Mapping in Network-on-Chip based Multicore Systems, IEEE International Conference on Omni-layer Intelligent Systems (COINS), Berlin, Germany, July 2023, pp. 1-6, doi: 10.1109/COINS57856.2023.10189228
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Md Farhadur Reza, “Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High Performance and Energy Efficient Computing Systems”, IEEE Access, vol. 10, pp. 65339-65354, 2022, doi:10.1109/ACCESS.2022.3182500.
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Md Farhadur Reza, Dan Zhao, Magdy Bayoumi, “Energy-Efficient Task-Resource Co-Allocation and Heterogeneous Multi-Core NoC Design in Dark Silicon Era”, Microprocessors and Microsystems, Volume 86, 104055, October 2021.
- Md Farhadur Reza and Tung Thanh Le, “Reinforcement Learning Enabled Routing for High-Performance Networks-on-Chip”, In Proceedings of 54th IEEE International Symposium on Circuits and Systems (ISCAS), Korea, January 2021.
- Md Farhadur Reza and Paul Ampadu, “Energy-Efficient and High-Performance NoC Architecture and Mapping Solution for Deep Neural Networks”, In Proceedings of 13th IEEE/ACM International Symposium on Networks-on-Chip, New York, USA, October 2019.
- Md Farhadur Reza and Paul Ampadu, “Approximate Communication Strategies for Energy-Efficient and High Performance NoC: Opportunities and Challenges”, In Proceedings of 29th ACM International Conference on Great Lakes Symposium on VLSI (GLSVLSI), Tysons Corner, VA, USA, May 2019.
- Md Farhadur Reza, Dan Zhao, Magdy Bayoumi, “HotSpot-Aware Task-Resource Co- Allocation for Heterogeneous Many-Core Networks-on-Chip”, Computers & Electrical Engineering, 68(C):581–602, 2018.
- Md Farhadur Reza, Tung Thanh Le, Bappaditya De, Magdy Bayoumi, Dan Zhao, “Neuro-NoC: Energy Optimization in Heterogeneous Many-Core NoC using Neural Networks in Dark Silicon Era”, In Proceedings of 51st IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, January 2018
Funding & Grants
- EIU Fall 2023 CFR Award, Proposal Title: “Intelligent Task-Resource Co-Allocation for Energy-Efficiency and High-Performance in High-Performance Computing Systems”, Sep. 2023, Eastern Illinois University. Funding amount: $4000.
- EIU Summer 2022 CFR Award: Have been awarded the summer 2022 research grant for the project entitled "Resource Management in Multiprocessor and Multicore Computing Systems", Eastern Illinois University. Funding amount: $4000.
- A. Richard Newton Young Fellow Award: Received the fellow award from Design Automation Conference (DAC) in 2014. DAC is the premier conference for design and automation of electronic systems. A fellow presents their PhD dissertation ideas and results during the DAC student event. Funding Amount: $400.
- ACM Travel Grant Award, Great Lakes Symposium on VLSI (GLSVLSI), 2016. Funding Amount: $200.
- GSO Travel Grant Award from University of Louisiana at Lafayette at attend GLSVLSI conference, 2016. Funding Amount: $400.
- GSO Travel Grant Award from University of Louisiana at Lafayette to attend DAC conference, 2014. Funding Amount: $400.
Frequently Taught Courses
Data Structures, Design and Analysis of Algorithms, Theory of Computation, Operating Systems, Deep Learning
Research & Creative Interests
Resource Allocation and Optimization, Computer Architecture and Networks, Artificial Intelligence and Machine Learning
Professional Affiliations
- Assistant Professor, Department of Mathematics and Computer Science, Eastern Illinois University (2021 – Present)
- Assistant Professor, School of Computer Science and Mathematics, University of Central Missouri (2019 – 2021)
- Post-Doctoral Associate, Virginia Polytechnic Institute and State University (2019 – 2019)
- Post-Doctoral Scientist, George Washington University (2018-2018)
- Graduate Research/Teaching Assistant, University of Louisiana at Lafayette (2012-2017)
- Software Developer, Sound Operating Systems, LLC (2013 – 2013)
- Lead Engineer, GrameenPhone Ltd., Telenor Group (2005 -2012)
- Quantitative Software Developer, Stochastic Logic, ACI Bangladesh Ltd. (2005 - 2005)